100352低功耗8-Bit缓冲器切断驱动程序
October 1989
Revised August 2000
100352
低功耗8-Bit缓冲器切断驱动程序
一般描述
The 100352 contains an 8-bit buffer, individual inputs (D
n
),
outputs (Q
n
), and a data output enable pin (OEN). A Q out-
put follows its D input when the OEN pin is LOW. A HIGH
on OEN holds the outputs in a cut-off state. The cut-off
state is designed to be more negative than a normal ECL
LOW level. This allows the output emitter-followers to turn
off when the termination supply is
−
2.0V, presenting a high
impedance to the data bus. This high impedance reduces
termination power and prevents loss of low state noise
margin when several loads share the bus.
The 100352 outputs are designed to drive a doubly termi-
nated 50
Ω
transmission line (25
Ω
load impedance). All
inputs have 50 k
Ω
pull-down resistors.
特点
s
Cut-off drivers
s
Drives 25
Ω
load
s
Low power operation
s
2000V ESD protection
s
Voltage compensated operating range
= −
4.2V to
−
5.7V
s
Available to industrial grade temperature range
订货代码：
Order Number
100352PC
100352QC
100352QI
Package Number
N24E
V28A
V28A
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
逻辑符号
连接图
24-Pin DIP
引脚说明
Pin Names
D
0
–D
7
OEN
Q
0
–Q
7
NC
Description
Data Inputs
Output Enable Input
Data Outputs
No Connect
28-Pin PLCC
© 2000 Fairchild Semiconductor Corporation
DS010248
www.fairchildsemi.com
